{"id":1678,"date":"2022-03-24T17:35:31","date_gmt":"2022-03-24T17:35:31","guid":{"rendered":"http:\/\/cad4security.org\/?page_id=1678"},"modified":"2022-12-18T18:31:00","modified_gmt":"2022-12-18T18:31:00","slug":"tdc-implementation-time-to-digital-converter-implementation","status":"publish","type":"page","link":"http:\/\/cad4security.org\/index.php\/cad-tools\/side-channel-analysis\/tdc-implementation-time-to-digital-converter-implementation\/","title":{"rendered":"TDC Implementation: Time-to-Digital Converter Implementation"},"content":{"rendered":"\n<h2 class=\"wp-block-heading\">Tool Name<\/h2>\n\n\n\n<p>TDC Implementation: Time-to-Digital Converter Implementation<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>CAD for<\/strong><\/h2>\n\n\n\n<p>Integrated Logic Analyzer<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Description<\/strong><\/h2>\n\n\n\n<p>A general purpose TDC implementation, whose purpose of the implementation is to track any delay changes in the platform used. This delay may occur due to additional program running, external changes\/attacks Glitch attacks, external EM attacks, etc. on the platform.<\/p>\n\n\n\n<p>The implementation consists of the files, such as initial delay (the num value needs to be calibrated to achieve a curve with similar TDC values), observable delay, clock divider, and encoder.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>More Info<\/strong><\/h2>\n\n\n\n<div class=\"wp-block-buttons is-layout-flex wp-block-buttons-is-layout-flex\">\n<div class=\"wp-block-button\"><a class=\"wp-block-button__link button\" href=\"http:\/\/cad4security.org\/wp-content\/uploads\/2_TDC.zip\" target=\"_blank\" rel=\"noreferrer noopener\">tool link<\/a><\/div>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Publications\/References<\/strong><\/h2>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Contacts<\/strong><\/h2>\n\n\n\n<p><a href=\"mailto:farimah@ece.ufl.edu\">Farimah Farahmandi<\/a> | University of Florida<\/p>\n\n\n\n<p><a href=\"mailto:m.muttaki@ufl.edu\">Md Rafid Muttaki<\/a> | University of Florida<\/p>\n\n\n","protected":false},"excerpt":{"rendered":"<p>Tool Name TDC Implementation: Time-to-Digital Converter Implementation CAD for Integrated Logic Analyzer Description A general purpose TDC implementation, whose purpose of the implementation is to track any delay changes in the platform used. This delay may occur due to additional program running, external changes\/attacks Glitch attacks, external EM attacks, etc. on the platform. The implementation &hellip;<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":1602,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"_genesis_hide_title":false,"_genesis_hide_breadcrumbs":false,"_genesis_hide_singular_image":false,"_genesis_hide_footer_widgets":false,"_genesis_custom_body_class":"","_genesis_custom_post_class":"","_genesis_layout":"","footnotes":""},"acf":[],"_links":{"self":[{"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/pages\/1678"}],"collection":[{"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/comments?post=1678"}],"version-history":[{"count":7,"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/pages\/1678\/revisions"}],"predecessor-version":[{"id":3756,"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/pages\/1678\/revisions\/3756"}],"up":[{"embeddable":true,"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/pages\/1602"}],"wp:attachment":[{"href":"http:\/\/cad4security.org\/index.php\/wp-json\/wp\/v2\/media?parent=1678"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}