Jon Azen
Senior Director
Qualcomm
Jon Azen is the senior director at Qualcomm. Jon is experienced in SoC security IP and subsystem development, with a focus on manufacturing, provisioning, and certification. Currently leading security initiatives at Qualcomm to ensure robust, trusted hardware solutions.
Chris Giles
Director of Product Management: Static & Formal
Siemens
Chris Giles is the Head of Product Management for Static and Formal Solutions. Chris comes to Siemens EDA from the user community, with decades of experience in IP and ASIC/SoC/FPGA R&D and management, with products deployed in consumer, military, compute and storage markets and at companies such as Hewlett Packard Enterprise, Honeywell, Seagate, Micron and LSI Logic. The author of 18 patents in areas such as hardware virtualization, security, processor architecture, synchronization schemes, and hardware prototyping, Chris received an MSEE from Stanford University in California and a BSEE from Rice University in Texas.
Norman Chang
Chief Technologist
ANSYS, INC
Norman Chang co-founded Apache Design Solutions in February 2001 and currently serves as Ansys Fellow and Chief Technologist at Electronics, Semiconductor, and Optics BU, ANSYS, Inc. He is also currently leading AI/ML and security initiatives at ANSYS. Dr. Chang received his Ph.D. in Electrical Engineering and Computer Sciences from University of California, Berkeley. He holds 33 patents and has co-authored over 60 IEEE papers and a popular book on ”Interconnect Analysis and Synthesis” by Wiley&Interscience at 2000. Dr. Chang is an IEEE Fellow for his contribution on ”Leadership and contributions to the physical-level sign-off of Electronic Design Automation for SoC/3DIC”. He is also a recipient of 2024 ”Distinguished Entrepreneur of the Year” Award from Chinese Institute of Engineers (CIE). He also actively engages in industry committees such as IEEE EDPS (Electronic Design Process Symposium) and SI2.
Qiaoyan Yu
Professor
University of New Hampshire
Qiaoyan Yu is a Professor of Electrical and Computer Engineering at the University of New Hampshire, where she directs the Reliable & Secure VLSI Systems Laboratory and the New Hampshire Cyber Security Enhanced Education Laboratory (NHCyberSEE Lab). She is a also Program Director at the Division of Computer and Information Science & Engineering (CISE), Secure & Trustworthy Cyberspace (SaTC) Program. Dr. Yu’s research expertise includes hardware security with special emphases on approximate computing security, integrated circuit security, FPGA security, embedded system security, IoT security, and Networks-on-Chip architecture for fault tolerance and error management. Dr. Yu received the NSF CAREER Award and the Air Force Research Lab Faculty Fellowship in 2017. Her work was also supported by SRC and UNH NSF Nanomanufacturing Center. She received the Best Poster Award at GLSVLSI’24, ISVLSI’16, Best Paper Award Finalist in MWSCAS’15, Best Paper Award Finalist in NOCS’11.
Amitabh Das
Principal Security Hardware Architect
AMD
Amitabh Das received his PhD degree from the Computer Security & Industrial Cryptography (COSIC) research group of the Electrical Engineering department of Katholieke Universiteit (KU) Leuven, Belgium, in 2013. He worked as a security researcher in the Security Center of Excellence (SeCoE) group at Intel Corporation and as a security research scientist in the Security & Privacy Research (SPR) lab of Intel Labs in Hillsboro, Oregon, USA between 2013 to 2018. He joined the System Management Unit (SMU) hardware group of Advanced Micro Devices (AMD), Austin, Texas, USA in 2018 as a security hardware architect. He is currently working as a Principal Member of Technical Staff (PMTS) in the area of hardware security architecture in the Product Security Office (PSO)/Security R&D group at AMD Austin since 2020. His major research interests include hardware cryptography, physical side-channel attacks and countermeasures, machine learning security, and SoC & IP hardware security.
Hadi Kamali
Assistant Professor
University of Central Florida
Hadi Kamali is an Assistant Professor in the Department of Electrical and Computer Engineering (ECE) at the University of Central Florida. His research delves into hardware security with a particular focus on exploiting IP protection techniques, design-for-trust, and AI-based CAD frameworks for security (design-for-security). His research contributions include the authorship of two books, two book chapters, five issued/pending patents, and numerous publications featured in top journals and conferences. His achievements have received recognition through several awards, including nominations and recipients of the Best Paper Award in ICCAD’19, ISVLSI’20, ICCAD’20, IEEE DCAS’20, HOST’22, DATE’23 (for two papers), and ASP-DAC’25.
Soheil Salehi
Assistant Professor
University of Arizona
Soheil Salehi is an Assistant Professor in the Electrical and Computer Engineering (ECE) Department at the University of Arizona and the Director of the privacy-preserving, intelligent, and secure computing lab (PRISM Lab). Before joining the University of Arizona, he was an NSF-Sponsored Computing Innovation Fellow (CIFellow) and Postdoctoral Research Fellow in the Accelerated, Secure, and Energy-Efficient Computing (ASEEC) Laboratory and the Center for Hardware and Embedded Systems Security and Trust (CHEST) at the University of California, Davis (UCD). Dr. Salehi’s research interests include Hardware and AI-enabled Security, Generative AI for Hardware Design and Security, and Energy-Efficient and Intelligent Signal Conversion and Processing in IoT. Dr. Salehi was the recipient of the Outstanding Reviewer Award at the IEEE/ACM Design Automation Conference (DAC) in 2023 and the recipient of an IEEE/ACM DAC dissertation forum grant in 2019. He was nominated for the 30-Under-30 Award at the University of Central Florida in 2020 and the Postdoctoral Research Excellence Award at the University of California Davis in 2022.
Reza Azarderakhsh
Professor
Florida Atlantic University
CEO
PQSecure
Dr. Reza Azarderakhsh is a CEO at PQSecure as well as a professor at Florida Atlantic Universities. He received his PhD from Western University in Canada. Dr. Azarderakhsh is well-known for his contributions in applied cryptographic engineering with focus on post-quantum cryptography and secure protocol development. At PQSecure, he developed quantum-safe cryptographic IPs and is commercializing them for small embedded devices. He has published more than 100 papers in top-tier journals and conferences about cryptographic engineering and received several best paper awards from various conferences. He also serves as an associate editor at IEEE Transactions on Circuits and Systems-Cryptography Track.
Avinash Ayalasomayajula
Senior Research and Development Engineer
Caspia Technologies
Avinash is a Senior Research and Development Engineer at Caspia Technologies. He specializes in pre-silicon security verification, where his work focuses on applying formal verification and computer-aided design (CAD) methodologies to detect and mitigate hardware security vulnerabilities. Avinash has developed generative AI-based tools for secure SoC design and verification, collaborating closely with industry partners. His extensive experience in property generation, formal assertion methods, and information flow tracking has contributed significantly to enhancing hardware security. Avinash’s passion lies in leveraging emerging AI techniques to fortify chip design against evolving cyber threats. Avinash holds a PhD in Electrical and Computer Engineering from the University of Florida.
Aydin Aysu
Associate Professor
North Carolina State Univeristy
President and Founder
mitrhilAI Corp.
Dr. Aysu is an associate professor and University Faculty Fellow at the Electrical and Computer Engineering Department of North Carolina State University, where he leads HECTOR: Hardware Cybersecurity Research Lab. He got his Ph.D. from Virginia Tech and was a post-doctoral researcher at the University of Texas at Austin. Dr. Aysu’s interests are broadly in hardware security research and cybersecurity education. His hardware security research has won NSF CAREER, NSF CRII, Google RSP, and Goodnight Innovation Fellow awards, six best paper nominations, two best paper awards, two hardware security top picks, and one publicity paper award. He is also the president of mithrilAI, an early-stage start-up developing secure AI hardware.
Erik Seligman
Senior Product Engineering Architect (Formal Verification)
Cadence Design Systems
Erik is currently the senior product engineering architect (formal verification) at Cadence Design Systems.
Mike Borza
Principal Security Technologist
Synopsys
Mike Borza is a principal security technologist for the Synopsys Solutions Group. He has experience in security systems and safety-critical systems engineering. Prior to Synopsys, Mike was a founder and the CTO of Elliptic Technologies, which was acquired by Synopsys. Mike holds a master’s degree in electrical engineering from McMaster University.
Siddharth Garg
Associate Professor
New york University
Dr. Garg is currently the Institute Associate Professor of Electrical and Computer Engineering at NYU Tandon, where he leads the ENSURE (Energy-Aware, Secure and Reliable Computing) Research group. Prior to NYU, he served as an Assistant Professor of ECE at the University of Waterloo from 2010-2014. His research interests are in machine learning, cyber-security and computer hardware design.
Sazadur Rahman
Assistant Professor
University of Central Florida
Sazadur Rahman is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at University of Central Florida. He is affiliated with both ECE and CS department at UCF under the “Cyber Security and Privacy Cluster”. Before joining UCF, Sazadur was a Security Architecture Engineer at Intel Corporation working in security hardening and threat modeling of next generation Xeon processors. His research interests include Semiconductor Supply Chain Security, AI-Assured Chip Design, Secure Heterogeneous Integration, and Hardware Acceleration of Fully Homomorphic Encryption. He has co-authored more than twenty peer-reviewed research papers, three patents (1 granted), one textbook, and several book-chapters during his Doctoral degree.
Jason Fung
Director of Offensive Security Research and Academic Research Engagement
Intel Corporation
Jason M. Fung is the Senior Director of Offensive Security Research at Intel, where he oversees the Scalable Assurance Strategy, including the “AI for Security Assurance” initiative. He leads emerging threat research for Intel technologies and fosters industry-academic collaborations to accelerate product security innovations. A recognized leader in the field, Jason helped create MITRE’s Hardware Common Weakness Enumeration (2020) and is a founding member of MITRE’s CAPEC/CWE Advisory Board. To inspire future security leaders, he co-founded HACK@DAC (2018) and the Princeton-Intel REU Program (2021). With 26 years at Intel, Jason has held diverse roles in architecture, performance, verification automation, security consultation, and engineering management. He has contributed to steering committees, founded security tracks for Intel conferences, and authored 7 US patents and dozens of publications.